What criteria should one keep in mind when choosing oscillators for use with fpgas?

[Altera_Forum]

There are multiple properties that define behaviour of circuits that generate clock signals for use with digital circuits. What are the important things that must be considered when choosing oscillator for use with FPGAs? Assume that no high speed memory interface or anything that needs transceivers is being used in the design.

[Altera_Forum]

I/O level compatibility (ie, LVCMOS vs LVPECL vs ...), frequency (obviously), stability (PPM), jitter (RMS ps)

[Altera_Forum]

In addition to what ak6dn said, these days it often makes sense to use a clock generator like one of these from Silicon Labs: 

 https://www.silabs.com/products/timing/clock-generator/si533x/pages/si533x.aspx  These chips can generate up to four clocks from one reference, and each clock can use a different signalling standard. Very low jitter, and you can reprogram the clocks at any time. We've been using the Si5338 for years. Great part. They're used on some of the newer Altera dev kit boards.

[Altera_Forum]

Agree with the comment on the Si53xx series parts, especially if you need the flexibility in frequency and/or other clock frequencies. Able to lock to an external frequency source as well (useful for datacom applications). Requires a local crystal (like 25MHz) or reference clock source. Very low jitter on the outputs. 

 Of course the SiLabs solution will be pricier than just an oscillator at a given fixed frequency.