What does this "pu1" of the clk means in the modelsim-altera ?

[Altera_Forum]

What does this pu1 of the clk means in the modelsim-altera ? 

The verilog codes of the cam in the cookbook (http://www.altera.com/literature/manual/stx_cookbook.pdf). There's 5 files: ram_block.v ram_based_cam_tb.v ram_based_cam.v cam_ram_block_tb.v cam_ram_block. All the files are compiled in the Quartus 11 successfully.The 2 testbench files (ram_based_cam_tb.v & cam_ram_block_tb.v) are also successful,but in the Modelsim 6.6 ,the waves are wrong, the "clk" is "pu1", what does this means? How to correct it ?

[Altera_Forum]

"pu1" means pull up high. It's a state to model outputs with pull up resistors. 

 Are you simulating the correct file? You should be simulating one of the test benches (_tb).

[Altera_Forum]

clk is pu1 ... 

 I know the license of the Altera-modelsim is error, but in modelsim ,It is successsful that running these codes by importing the megafunctions of altera Manually ! There is no clk pu1