What happens when I/O is configured as BLVDS but VCCIO pin is fed by 3.3V?

[REics]

I have a design (already mass produced) where the VCCIO is fed with 3.3V, but I/Os on it are configured as BLVDS.

What happens? Does it damage the device? Does it just create an out of spec BLVDS output signal?

[YuanLi_S_Intel]

Hi Rolf,

May i know which device you are using? If is much recommended if you could supply the VCCIO needed for BLVDS.

Thank You.

[REics]

It's a EP4CE40F23C8N. I know it's not recommended and I won't deliberately do it, but I have a number of devices out in the field already and want to know what the effects of this are. My BLVDS signal looks ok and does what I want, the question is more I run the risk of damaging something. I have set the outputs to lowest current (8mA) as security measure, though.

[YuanLi_S_Intel]

The problem would be damage to I/O buffer. If it is exceeding the absolute maximum rating of VCCIO.

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/cyclone-iv/cyiv-53001.pdf (Page 2)