Whether it supports Clock Control with clock primitive for Agilex series?

[javen1122]

I want to instantiate a clock gate .Whether it supports Clock Control with clock primitive for Agilex series? If the answer is yes, I need the interface parameter configuration and detailed port list.

[Ash_R_Intel]

Hi,

Please refer to the following link for Agilex 7 Clock Control IP information:

4. Clock Control Intel® FPGA IP Core

Regards