Why does Striatix 10 -3 speed 's Fmax of ROM restricted on 420Mhz, But it is not described in Timequest report?

[LChen23]

Hi, expert

As Table 65. Memory Block Performance Specifications for Intel Stratix 10 Devices​ in Stratix 10 datasheet, the 'True dual port, all supported widths ' -E3V, performance is 420Mhz. But after timing analyzing in timequest , The report the Fmax summery is higher than 420Mhz , even could reach above 500Mhz .

so , my question is , which one should I trust, the 420Mhz in datasheet or 500Mhz+ in timequest report?

Thanks.

[KhaiChein_Y_Intel]

Hi,

Can you provide the report?

Thanks.

[KhaiChein_Y_Intel]

Hi,

May I know if you have any udpates?

Thanks.

[LChen23]

I find the reason, it seems the 900mV timming model report Fmax strict to 420Mhz. and VCCRAM is 900mV.

[KhaiChein_Y_Intel]

Hi,

Do you have any questions?

Thanks.