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Hello Friends,
I want to port the aeMB soft-core processor on to the EP2AGX125 arria FPGA. The required speed grade is -6 and clock speed required is 166MHz. How do I approach this? I downloaded the aeMB files from opensource.org. They had a host of folders viz- branches,tags and trunk. They have many verilog files in it and i am a bit confused as to how to approach this in Quartus. Also, aeMB documents are very few in the net. Could you post some tutorials or relevant docs pls. Also aeMB is in verilog. Can i do simulation of this in ModelSIM? I have the students edition of ModelSim, how can I proceed with this pls? Regards, Vinod.Link Copied
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