Programmable Devices

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Programmable Devices

Discussions

FPGA PCIe doubts

Verilog down counter checking for carry

Quartus II Simulator Output driving Simulator Input

Problem in Inter FPGA Transfer

Can not simulate MAX10 with Differential IO buffers (quartus prime)

Clock Video Input (CVI) usage in VIP IP Core suite

Problem to include ALTASMI_PARALLEL to Cyclone III project.

Altera FPGA Fabric Timings - Avaliable?

ModelSim Licensing Issue

current drive capability of cyclone II EP2C20F484C7 FPGA

Why does my ddr2 not work sometimes?

ethernet phy export to fpga portion

Can I produce 4 MHz from a 10 MHz input?

aoc error: DSP Builder for Intel(R) FPGAs - Advanced Blocks Through A10 fpga

Fast N-Body application in embedded RAM (Cyclone 10 GX)

Featured Content

AGILEX5 - HPS-first - timeout waiting for RECONFIG_COMPLETED

10M04SCU324I7G - I/O timing

Cyclone V issue with Fractional PLL and Reconfig IP Modules

I350 igb driver failed with error -2

Request for the Product Lifecycle Status

Re: USB Blaster selection criteria

Solution: USB Blaster Driver for Windows 11 ARM