Programmable Devices

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.

Programmable Devices

Discussions

Pin Planner LVDS Differential Pair Selection

Timing Analyzer not deriving PLL clock

Arrow SoCKit for HD Video Output

Overclocking RAM for simulation and compliation

Installing an operating system on the altera DE1 sockit board

Beginners Questions on Qsys Integration

Reprogramming the fpga at runtime from hps.

HWLIB and Quad SPI Flash Controller

Extracting .jic from cyclone III

Cyclone II: PLL

Cyclone V LVDS_RX IP

HDL designer and altera megafunctions

ALTDDIO_OUT. How to overcome restrictions on output data port?

Qsys tutorial simulation errors

USB to UART FT232 Gamepad HID

Featured Content

AGILEX5 - HPS-first - timeout waiting for RECONFIG_COMPLETED

10M04SCU324I7G - I/O timing

SDI pinning on Agilex 5

I350 igb driver failed with error -2

Request for the Product Lifecycle Status

Re: USB Blaster selection criteria

Solution: USB Blaster Driver for Windows 11 ARM