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Intel Community
FPGAs and Programmable Solutions
Programmable Devices
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Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
Discussions
Post a Question
Stratix 10 crashing with declared ASD regions
by
AGlad5
on
07-06-2020
10:31 AM
0
Replies
3
Views
0
0
1pcs field return related with FPGA 10AX032H4F34E3SG
by
FTang
on
07-02-2020
06:49 PM
Latest post on
07-06-2020
08:50 AM
by
Zawani_M_Intel
1
Reply
14
Views
0
1
MAX10 PLL dedicated routing warning
by
lutzek
on
06-20-2020
08:56 AM
Latest post on
07-06-2020
06:30 AM
by
IDeyn
1
Reply
39
Views
0
1
Max10 sometimes randomly stops operation, depending on settings in Signal Tap Logic Analyzer
by
KS_AX
on
06-30-2020
06:06 AM
Latest post on
07-06-2020
05:55 AM
by
IDeyn
2
Replies
40
Views
0
2
Problem with Altera DE2-115 board, unable to boot or load new programming
by
KRasm4
on
06-18-2020
01:42 PM
Latest post on
07-06-2020
01:15 AM
by
Deshi_Intel
2
Replies
24
Views
0
2
Arria10 GX design example of 40GE ethernet usgae ?
by
3000021845821_5
62225
on
06-17-2020
07:29 AM
Latest post on
07-06-2020
01:04 AM
by
Deshi_Intel
4
Replies
22
Views
0
4
TSE MAC phy MDIO write not working.
by
JDeff
on
06-05-2020
10:19 PM
Latest post on
07-06-2020
12:42 AM
by
Deshi_Intel
4
Replies
27
Views
0
4
Setup slack on generated clock of SDRAM.
by
anm
on
06-22-2020
09:23 PM
Latest post on
07-05-2020
07:21 PM
by
KhaiChein_Y_Int
el
4
Replies
69
Views
0
4
Single-Port Triple-Speed Ethernet and On-Board PHY Chip Reference Design Online Files Corrupted
by
bansarth
on
07-02-2020
09:51 AM
Latest post on
07-05-2020
07:01 PM
by
Deshi_Intel
3
Replies
47
Views
0
3
Warning (287001): Assertion warning: Device family MAX10 does not have MLAB blocks -- using available memory blocks
by
XShen1
on
06-14-2020
02:20 PM
Latest post on
07-05-2020
06:46 PM
by
KennyT_Intel
5
Replies
33
Views
0
5
Design with Logic Lock region cannot fit anymore Error (18999): Placement cannot find a legal solution
by
avk
on
06-05-2020
12:21 PM
Latest post on
07-05-2020
06:39 PM
by
KennyT_Intel
9
Replies
72
Views
0
9
What’s the eMMC max data rate the cyclone V supported with 8-bit data bus?
by
dtong5
on
06-27-2020
06:51 AM
Latest post on
07-05-2020
02:13 PM
by
EBERLAZARE_I_In
tel
1
Reply
20
Views
0
1
Quartus Web Edition license suitable for "public" CI on GitHub/Travis?
by
Altera_Forum
on
04-11-2018
10:38 AM
Latest post on
07-04-2020
05:40 AM
by
mfro
2
Replies
746
Views
0
2
Working c project for "qspi" read and write from hps arm controller baremetal
by
hsaee6
on
07-02-2020
07:15 AM
Latest post on
07-04-2020
04:58 AM
by
hsaee6
2
Replies
34
Views
0
2
Dedicated SERDES usage for ADC LTC2387-18 with Cyclone V?
by
VOS
on
07-03-2020
04:14 AM
0
Replies
24
Views
0
0
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