Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
21323 Discussions

communication with a processor imx7

Altera_Forum
Honored Contributor II
1,960 Views

Hello everyone,  

I'm asking when the processor Imx7 send a signal to FPGA max 10. How could I capt the signal and then decode it?  

Could anyone help me please, thanks a lot
0 Kudos
4 Replies
Altera_Forum
Honored Contributor II
595 Views

 

--- Quote Start ---  

Hello everyone,  

I'm asking when the processor Imx7 send a signal to FPGA max 10. How could I capt the signal and then decode it?  

Could anyone help me please, thanks a lot 

--- Quote End ---  

 

 

This really depends on what sort of signal! Are you looking at treating the FPGA as a SPI slave, using SPI for communication? CAN? I2C? UART? Or a generic data/address bus using a custom driver and GPIO? Maybe even reusing a QSPI interface and treating the FPGA as memory? 

 

In short, if you're just talking about a single line, then you want to register the signal in the FPGA once you get it with some sort of if(rising_edge(clk)) statement, unless you're trying to do something special. 

 

Details would really help.
0 Kudos
Altera_Forum
Honored Contributor II
595 Views

 

--- Quote Start ---  

This really depends on what sort of signal! Are you looking at treating the FPGA as a SPI slave, using SPI for communication? CAN? I2C? UART? Or a generic data/address bus using a custom driver and GPIO? Maybe even reusing a QSPI interface and treating the FPGA as memory? 

 

In short, if you're just talking about a single line, then you want to register the signal in the FPGA once you get it with some sort of if(rising_edge(clk)) statement, unless you're trying to do something special. 

 

Details would really help. 

--- Quote End ---  

 

 

Thank you for your replying 

We decided to use SPI or I2C. The thing I wanna do for the moment is really simple, CPU send a signal, then FPGA received that signal and light up a LED. But still, how could I checked in quartus if I received correctly the signal from CPU. I've never communicate FPGA and CPU before 

thanks a lot
0 Kudos
Altera_Forum
Honored Contributor II
595 Views

 

--- Quote Start ---  

Thank you for your replying 

We decided to use SPI or I2C. The thing I wanna do for the moment is really simple, CPU send a signal, then FPGA received that signal and light up a LED. But still, how could I checked in quartus if I received correctly the signal from CPU. I've never communicate FPGA and CPU before 

thanks a lot 

--- Quote End ---  

 

 

If you're just testing the GPIO, the easiest way is toggle a GPIO on the i.MX7, and directly wire that output in the FPGA to an LED (pass through). If you want to just confirm the signal is reaching the FPGA, you can use a clock, register the input, and look at it using SignalTap, the Altera built-in logic analyzer tool. 

 

I'd recommend using SPI, as it is a faster protocol, and really worth understanding if doing firmware development. Now, if you're using SPI things get a bit more complicated. You probably want to start by experimenting with an n-bit SPI word from the i.MX, and decode the message in the FPGA. SPI works that whenever the chip select goes low, data is clocked in to the slave device using the SPI clock at some rate. Once chip select goes high, the data is valid, and the FPGA can then process the received message. 

 

Or just tie the chip select from the i.MX to an FPGA output, and probe the signals. 

 

Lots of options!
0 Kudos
Altera_Forum
Honored Contributor II
595 Views

 

--- Quote Start ---  

If you're just testing the GPIO, the easiest way is toggle a GPIO on the i.MX7, and directly wire that output in the FPGA to an LED (pass through). If you want to just confirm the signal is reaching the FPGA, you can use a clock, register the input, and look at it using SignalTap, the Altera built-in logic analyzer tool. 

 

I'd recommend using SPI, as it is a faster protocol, and really worth understanding if doing firmware development. Now, if you're using SPI things get a bit more complicated. You probably want to start by experimenting with an n-bit SPI word from the i.MX, and decode the message in the FPGA. SPI works that whenever the chip select goes low, data is clocked in to the slave device using the SPI clock at some rate. Once chip select goes high, the data is valid, and the FPGA can then process the received message. 

 

Or just tie the chip select from the i.MX to an FPGA output, and probe the signals. 

 

Lots of options! 

--- Quote End ---  

 

 

 

 

Could you give me more detail about this? Because I'm a new user.  

What should I do exactly in quartus to do the connection with processor
0 Kudos
Reply