Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
21019 Discussions

cyclone iv PCB design

mnasser431998
Novice
1,389 Views

Hello everyone,

I am designing a custom board that hosts cyclone iv E BGA package. The board is intended to be used in video applications and SoCs therefore it has to have good amount of logic elements and a large DDR memory. Other peripherals are not something special. However, I have some questions that I didn't find helpful answers for them. How to use FTDI chip for programming and UART communications between the FPGA and host PC? Are there some considerations for the routing of the DDR in order to function correctly? What are the required voltages on the board needed for the FPGA 3.3V, 2.5V, 1.2V...? and How to connect them to the FPGA?

I know that there are boards out there and I have one indeed from trenz but the board I am designing has special custom peripherals I need.

 

Thanks,

0 Kudos
4 Replies
JonWay_C_Intel
Employee
1,380 Views

Hi @mnasser431998 

I think your query requires support from several subject matters experts.
I am here to help you on the voltage rails queries.

What voltage you need depends on what interface you are working with.

Example: If you connect to a chip that uses LVCMOS 3.3, then you use IO standard 3.3V. Then you need to power with VCCIO 3.3V.

There is a pin connection guideline that specify how you should connect your pins. And also a schematic review checklist to ensure you follow the guideline. Pasted the links below.

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/dp/cyclone-iv/pcg-01008.pdf

https://www.intel.com/content/dam/altera-www/global/en_US/others/download/board-layout-test/schematic-review-ws/worksheets/Cyclone_IV_Schematic_Review_Worksheet.doc

mnasser431998
Novice
1,374 Views

Thank you for your fast reply,

I have a further question related to IO. I noticed that DDR memories work SSTL IO standard which is about 1.2V and I know that I can change IO standard type in FPGA PinPlanner but how are these voltages are generated? do I need to generate them with external supply and connect the bank VCCIO to the supply I need to work with then change the IO standard type within the PinPlanner? or I can hook the VCCIO of all banks to a higher voltage for example 3.3V and then the FPGA internal circuitry takes care of generating the required voltage type? or there are specific voltages I need to connect the FPGA with( ex 3.3, 2.5, 1.2) in order to be able to generate all IO standards?

 

Thanks in advance

0 Kudos
JonWay_C_Intel
Employee
1,351 Views

Table 6-3 in https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/cyclone-iv/cyiv-51006.pdf

...this will be helpful to your questions

It specify what voltage you should provide to VCCIO for every IO standard selection.

 

mnasser431998
Novice
1,348 Views
0 Kudos
Reply