Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers

cyclone v e LVDS

Overstay123
Beginner
894 Views

您好,我打算使用cyclone v e系列的5CEFA5芯片来设计pcb电路。我想将我的 fpga 与具有 1.8V 和 lvds 接口的 adc 连接,但我看到 lvds 仅支持 2.5v 电压输入。我可以将 vccio 设置为 1.8v 吗?或者这个 2.5v lvds 是否与 1.8v lvds 兼容?

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4 Replies
Farabi
Employee
856 Views

Hello,


I am sorry, we only have english language as medium of technical support. We will reply your question in english language.


regards,

Farabi


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AqidAyman_Intel
Employee
813 Views

Hello,


It should be compatible as long as you keep the Vid and Vicm is within the specification mentioned.


For optimized LVDS receiver performance, the receiver voltage input range must be within 1.0 V to 1.6 V for data rate above 700 Mbps and 0.00 V to 1.85 V for data rate below 700 Mbps.


2.5V only for powering up the differential input buffer.


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AqidAyman_Intel
Employee
718 Views

Hello,


Is there any more help needed?

Is my last answer help you moving forward?


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AqidAyman_Intel
Employee
650 Views

As we do not receive any response from you on the previous question/reply/answer that we have provided, please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.


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