I'd like to implement a SIO in a MAX10 FPGA connected via eSPI to an Intel Atom CPU.
It is not really clear to me how to use the Intel eSPI Slave IP core for driving peripheral components like UARTs, GPIOs etc.
Has there anyone an example design or can explain in detail how I could to do this?
Thank you in advance
There is no eSPI reference design for user as I know.
The source for user reference are from the documents as below:
Thank you for your reply!
I know these documents. But unfortunately there is no explanation how to go on with connection of peripheral devices like UARTs or GPIOs in detail.
Is there anyone who has used the eSPI IP core and can give me some support?
Unfortunately, I am not aware of anyone who has used eSPI IP before in order to recommend for now.
We only have the documents to support on this particular IP.
There are customers who are using it in their design and I am not sure the full details of their design.
The support we provided to them is mainly on the communication protocol issues when they applied in their system. Example like provide them simulated test waveform for a specific type of transaction performed by the eSPI IP as their basic reference.