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hi everyone:
i am new to altera, and i have use xilinx spartan for 6 years. should i change to verilog? i heard that altera provides more support for veirlog, is that true? i have one experience recently: i bulid a project, it certain a nios and a custom ip, if i choose create simulation model in verilog, the simulation runs successful, but if choose create simulation model in vhdl, the simulation failedLink Copied
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Quartus can compile both VHDL and Verilog just fine. It also had better system verilog support until recently (vivado SV support is quite good now).
But if you're using altera IP, you may be generally better off generating it in verilog, as all the in house cores are generated in Verilog or newer ones in System Verilog.- Mark as New
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thanks!
now i think i should change to verilog... mix language may cause problems in debug, a good beginning is very important, i do not want to meet some problem caused by mix language after i wrote thounds lines of code.- Mark as New
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Yes, my experience is that generally Quartus II will tend to work better and stable with verilog coding.
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--- Quote Start --- Yes, my experience is that generally Quartus II will tend to work better and stable with verilog coding. --- Quote End --- There is no evidence to support this statement, is there?

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