Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
公告
FPGA community forums and blogs on community.intel.com are migrating to the new Altera Community and are read-only. For urgent support needs during this transition, please visit the FPGA Design Resources page or contact an Altera Authorized Distributor.
21615 讨论

i2c routing through FPGA

rshal2
新分销商 II
1,227 次查看

Hello,

 

 I would please like to ask about AN706:

It states:

"HPS I2C0 is routed through the FPGA interface and acts as a master to various on-board I2C slaves: ...... A bi-directional buffer, ALT_IOBUF, must be added in the design to connect the I2C signals to an external open drain IO. The buffer can be included by instantiating ALT_IOBUF in ghrd_top.v"

I don't understand, what does it mean that " I2C0 is routed through the FPGA" ?

And what is the purpose of ALT_IOBUF ?

 

Thank you!

0 项奖励
1 回复
EBERLAZARE_I_Intel
951 次查看

Hi,

 

Based on my understanding, it means that this will act the I2C0 as a master to the on-board I2C slaves.

 

You may find the "ALT_IOBUF" user guide here for more explanation of the IP:

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_altiobuf.pdf

 

Regards.

0 项奖励
回复