mSGDMA to LVDS SERDES

[KRoma6]

What is the best way to send data to and from memory / LVDS SERDES? I currently have a mSGDMA (MM to Stream and stream to MM) with the streaming port exported. I then connect the exported streaming signals to the exported conduit signals of the LVDS SERDES using Verilog. I am getting a timing issue with the msgdma sink valid signal reporting a "long combinational path". Also platform reports a warning that the reset signal must be export with the stream but doing so results in a error. 

[EngWei_O_Intel]

Hi Kyle

You can refer to the MSGDMA design example in the below link:

https://community.intel.com/t5/FPGA-Wiki/MSGDMA-design-example/ta-p/735335

Thanks.

Eng Wei

[KRoma6]

Hello,

The example project comes in the .gz file, when I extract it becomes a tar file. How do you extract to get a working project directory?

[EngWei_O_Intel]

Hi Kyle

After to untar the package, you should be able to get a *qpf file (msgdma_example.qpf) that is able to be opened with Intel Quartus Prime Pro tools.

Thanks.

Eng Wei

[EngWei_O_Intel]

Hi Kyle

We do not receive any response from you to the previous reply that have been provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.

Eng Wei