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Honored Contributor I

nios running from ddr program memory range



My design has a Nios cpu, on chip ram and ddr2. I have had the nios running from the on chip ram and now am using the ddr2 as my code size is getting larger than the on chip ram will allow.  


As well as running the nios, I am using the ddr2 to store sampled data. 


What I would like to do is specify a range within the ddr2 address space for example 256k and restrict the nios to only use that range. Leaving the rest of the ddr2 free for data etc.  


What I am worried about is overwriting memory locations being used by the nios while running with sampled data. I want to use the ddr2 efficiently and at the moment all I can think is to use addresses far from the start of the ddr2 for storing data without affecting the running nios.  


The eds shows the compiled code size required for code + initialized data and free space for stack + heap. When I program this to the ddr does it get programmed to the start of the address space? If for example the code size is 100KBytes and I allow say another 100KBytes for stack + heap can I start using addresses offset 200Kbytes from the start address safely? 


Any help would be appreciated. 



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