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placement of GPIO with ALTLVDS LVDS pins on same bank failed

kikoss
New Contributor I
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Hello 

- I am using  Agilex7 , and I implemented the following LVDS design recommended by altera spec to place ALTLVDS and ALTLVDS RX on the same bank - (the bank used is 2F ) 

 

kikoss_0-1718115856212.png

 

The design  compiles and fit well on the FPGA ,  and the IO standard used for the LVDS RX and TX is : I/O standard True Differential Signaling

 

- next step I did , is to add some single ended GPIO for external control 

I need the GPIO be on the same bank (2F) as the ALTLVDS RX and ALTLVDS TX pins 

But the placement failed and this is the error message 

Error(11924): Bank '2F' has conflicting VCCIO settings
Error(11928): 'TX_LVDS_ADC_4P~pad' with I/O standard True Differential Signaling, was constrained to be within bank '2F'
Info(11929): '1.5V' is a valid VCCIO value
Error(11928): 'GPIO1~pad' with I/O standard 1.2 V, was constrained to be within bank '2F'
Info(11929): '1.2V' is a valid VCCIO value

 

Seems some mismatch on the IO standard ... 

Is there some way to place GPIO and ALTLVDS lanes correctly  on the same bank ?  

 

THX 

Kikoss

 

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kikoss
New Contributor I
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@FvM   
you may help about that .. 

 

THX

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FvM
Valued Contributor III
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Hi,

thanks fo your confidence. Unfortunately I'm not yet familiar with Agilex FPGA series. 

As far as I understand Agilex 7 datasheet, true differential TX on GPIO banks requires VCCIO of 1.5 V, there's apparently no fitting single ended IO standard that could be used on an 1.5 V GPIO bank. What are your voltage requirements for single ended GPIO pin? 

kikoss
New Contributor I
8 Views

I have no special requirement for the GPIO since it connected to a custom board that we develop and we can adjust the voltage following the FPGA possibilities 

 

  • I tried to set the GPIO to be 1.5V but the fiitter failed (this is my qsf command : set_instance_assignment -name IO_STANDARD "1.5 V" -to GPIO1 -entity safety_top_level)

 

  • It failed also when I tried also to make the bank 1.5V as the following : set_global_assignment -name IOBANK_VCCIO 1.5V -section_id 2F

 

the error from the fitter is the same in the 2 cases
Error(12341): The output pin GPIO1 has a 1.5 V I/O standard, but the selected device does not support output pin operation with a 1.5 V I/O standard.

THX

 

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