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In my system, I use one DMA to transfer data from a component to SDRAM. I created a component by myself which has an Avalon MM slave contain 2 outputs type dataread and dataavailable, and both is driven by a clock named clk1. At the DMA controller side, it is driven by a clock named clk0( also system clock). clk0 = 125 MHz, clk1 = 25MHz. SDRAM is driven by clk0.
My idea is for per clk1 cycle, the DMA will transfer data from my component to SDRAM. I wonder with 2 different clock, whether DMA can work or not. Is the outputs from my component ok or I have to add more signals to synchronize? Here is my code, but it just print "dma opened" which mean dma successfully opened, but it never end. Is there any error?
volatile int dma_complete = 0;
void dma_done(void* handle, void* data)
{
dma_complete = 1;
}
int main (void)
{
alt_u32 buffer;
//printf("%d", buffer);
//camera_reset();
alt_dma_rxchan rx;
/* Obtain a handle for the device */
if ((rx = alt_dma_rxchan_open ("/dev/dma_0")) == NULL)
{
printf ("Error: failed to open device\n");
exit (1);
}
else
{
/* Post the receive request */
alt_dma_rxchan_ioctl(rx, ALT_DMA_RX_ONLY_ON, RAW2RGB_0_BASE);
alt_dma_rxchan_ioctl(rx, ALT_DMA_SET_MODE_16, NULL);
IOWR_ALTERA_AVALON_PIO_DATA(START, 0x01);
printf("dma opened...\n");
if (alt_dma_rxchan_prepare (rx, buffer, 1228800, dma_done, NULL) < 0)
{
printf ("Error: failed to post receive request\n");
exit (1);
}
/* Wait for the transaction to complete */
while (!dma_complete);
printf ("Transaction complete\n");
alt_dma_rxchan_close (rx);
}
return 0;
}
THANKS
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