remote upgradation of FPGA

Altera_Forum · ‎07-30-2010

Hi,

i m new to this topic.what type of stuff should i read to know more about remote upgradation of FPGA? Could you plz explain how to upgrade SOF or POS file in Cyclone III FPGA remotely through eathernet?

Thanks in advance.

Altera_Forum · ‎07-30-2010

Start at the Cyclone III handbook chapter 9. There remote update is explained. Never used it myself.

Success, Ton

Altera_Forum · ‎07-30-2010

Yes, I use it, it works great. My only source of information was that chapter and the ALT_ASMI_PARALLEL and ALT_REMOTE user manuals.

So all you need to do is to read those manuals.

Altera_Forum · ‎07-30-2010

I've got to say I got a kick out of the term "upgradation".

There are a few components to remote upgrade:

1 - Uploading your new image to the FPGA

2 - Programming the new image into your configuration flash

3 - Remotely triggering the reconfiguration.

Now you indicate that for# 1 you want to use ethernet. To me this means a NIOS processor running a TCP/IP stack. Then you can use FTP or TFTP or your own mechansim for getting the image down to the FPGA. However, if you're not using a NIOS, you've got to write some custom HDL to handle the ethernet.

For# 2, you have a few options. If you are using a NIOS, it's pretty easy to interface to the flash and program the new data in. If you are not using a NIOS, you can use the PFL or SFL (parallel or serial flash loader) megafunctions to program the flash.

# 3, use the remote_update core as std_logic_vector indicated.

Jake

Altera_Forum · ‎07-30-2010

There is an EPCS core for the nios2 processor so you have the capability of writing to the configuration flash using the cpu.

You could write a server program that accepts and verifies a pof image and then writes it to configuration flash.

Altera_Forum · ‎08-23-2010

Hi Jake,

thank you for your precious time and help.

i got stuck near building SOPC builder only. while connecting ethernet in my SOPC system i got error like this.

"Error: altera_ethernet.receive/altera_ethernet.transmit: The width of the error signal from the source is 6 bits, but is 1 bits to the sink."

so i am not able to even generate my SOPC system.

i got one doubt regarding point# 2 in your explanation.

if i dont use NIOS II ,still can i load my POF files remotely to FPGA by SFL and PFL through ethernet?

if it is easy with NIOS II then could you pl. tell me more details regarding NIOS II usage in remote upgradation of FPGA

i have to upgrade my FPGA with new POF files once in 10 days( let it be) through ethernet only. i am using cyclone III and EPCS4 flash memory.

i am not able to fine solution for my problem. Could you Pl. help regarding this?

thanks in adavance.

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