safety critical CPLD or FPGA

[greevebmc]

Hi, I need to implement a trivial algorithm into a CPLD or FPGA for a project. The problem is that it has to meet SIL2 safety integrity level. Has anyone any experience with this? Is Quartus Prime (web edition) certified for safety at all? I would use a MAX V CPLD if possible, since my code will be very simple.

[ChiaLing_T_Intel]

Hi Barbara Cowie,

Thank you for contacting Intel Community.

First of all, I would like to clarify if you are looking for functional safety information. If yes, please kindly refer to the following link:

https://www.intel.la/content/www/xl/es/industrial-automation/programmable/applications/automation/functional-safety.html

For your information, Intel FPGA and software can be used in a SIL 3 certified system from Functional Safety Data Package (FSDP) v4.0 onwards. Kindly refer here for more details:

https://www.intel.com/content/www/us/en/programmable/support/support-resources/knowledge-base/solutions/rd03282013_344.html

For meeting the SIL 2 requirement, you may consider using the FSDP v1.0/v2.0/v3.0.

Thank you

Regards,

Chia Ling