- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Link Copied
1 Reply
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
It refers to inputs and outputs paths. Unless you add set_input_delay and set_output_delay then the tool wouldn't know about those paths. If you are designing an internal module (not final integration yet) then you can ignore these warnings until such time when you assign pins in the final stages in which case you need to know the external input/output devices timing parameters such as tCO,tSU,tH

Reply
Topic Options
- Subscribe to RSS Feed
- Mark Topic as New
- Mark Topic as Read
- Float this Topic for Current User
- Bookmark
- Subscribe
- Printer Friendly Page