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I am trying to simulate the traffic controller modules in the 10GBASE-R PHY MegaCore (have attached the design files for reference). When I try to simulate the avalon_st_traffic_controller.v design file, the design is not loaded. It gives me instantiation errors, saying that the files are missing. One of them is
Instantiation of 'crcgen_altcrc' failed. The design unit was not found. But I checked the design and found that, 'crcgen_altcrc' is encrypted. How can I overcome this problem. I have attached the design files for reference. thanks, ManihatnLink Copied
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similar errors usually appears when you using non-english symbols in project path or cpu user name.

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