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Hi,
I have a reference design with some files that has .vs extension. These files are used in the design with module instantiations.
I am trying to compile the design in quartus. But I am not able to add .vs files in the project as it throws error.
Please help me with what .vs files extension is and how to add them in design.
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.vs is not an HDL file extension. Could these files have been saved incorrectly as .vs when they should be .sv (SystemVerilog)?
#iwork4intel
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Hi,
.vs file is not supported in the software.
Thanks.
Best regards,
KhaiY
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Is it a valid file extension that is not supported by quartus.
Is there a way to change these files to .vs or .v and include in quartus project.
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If they are actually Verilog or SystemVerilog files, just change the file extensions.
#iwork4intel
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Hi SK_VA,
Do you have any questions?
Thanks.
Best regards,
KhaiY
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Hi,
We do not receive any response from you to the previous question/reply/answer that I have provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you
Best regards,
KhaiY

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