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why only one pll? and no internal oscillator

Honored Contributor II

Hi all, 


I am tinkering with a schematic design using the Quartus lite software. I've created a project with Quartus lite with a top-level schematic. I've tried using the internal oscillator, altufm_osc wiring the enable high and trying to implement. The fitter reports Error (12024): WYSIWYG primitive "maxii_ufm_block1" is not compatible with the current device family. This is the only library component displayed that remotely resembles the internal oscillator that several pieces of documentation say is available to designs. What gives. 


Similarly I have tried instantiating two PLLs and get a message there is only one available. According to the docs, there are supposed to be four in the MAX10m50SCE144 part. Is this because the free software doesn't support the chip functionality? 



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Honored Contributor II

I have no problem to instantiate an Internal Oscillator in MAX10xxSC device using the IP library. You can also directly instantiate a fiftyfivenm_oscillator primitive. 


Unfortunately some documents, e.g. MAX 10 FPGA Device Overview don't explicitly state that all MAX10xxSx (single supply version) have only one PLL.