Intel® Xeon® Processor and Server Products
Intel® Xeon® Processors, Data Center Products including boards, integrated systems, and RAID Storage
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How is Source Address Decoder programmed in a NUMA server?

MBloo4
ビギナー
1,952件の閲覧回数

For things like hot-plugging of new QPI/UPI segments (e.g. populating a new CPU socket ) or of new DIMMs an attention button is used to invoke the SMM handler and reconfigure the SAD and the TAD in each node.

 

But if the OS remaps a PCI device (e.g. changing the value of one of its BARs) attached to a socket's local PCIe link, it can potentially use an address not routed to that socket by the current SAD configuration.

 

How is this case handled? How is the physical address space mapped between sockets (particularly, the part not backed by the RAM)?

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SergioS_Intel
モデレーター
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Hello MBloo4,

 

Can you please provide to us the model of your Intel(R) server board? 

 

Best regards,

 

Sergio S.

 

Intel Customer Support Technician

Under Contract to Intel Corporation

For firmware updates and troubleshooting tips, visit :https://intel.com/support/serverbios

SergioS_Intel
モデレーター
1,601件の閲覧回数

Hello MBloo4,

 

We are following your question and would like to know if you need further assistance.

 

Best regards,

 

Sergio S.

 

Intel Customer Support Technician

Under Contract to Intel Corporation

For firmware updates and troubleshooting tips, visit :https://intel.com/support/serverbios

 

SergioS_Intel
モデレーター
1,601件の閲覧回数

Hello MBloo4,

 

In case you need more help, please contact us back.

 

Best regards,

 

Sergio S.

 

Intel Customer Support Technician

Under Contract to Intel Corporation

For firmware updates and troubleshooting tips, visit :https://intel.com/support/serverbios

 

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