PCIe spec defined 3 types of AtomicOps transactions:
"AtomicOps are architected for device-to-host, device-to-device, and host-to-device transactions."
If Intel® Xeon® Processor Scalable Family support Pcie AtomicOps host-to-device transactions? The background for this question is it looks in previous Xeon generation, only PCIe AtomicOps device-to-host transactions are supported: "The Intel Xeon processor E7 V2 family supports PCIe atomic operations (as a completer)". Not sure if Scalable family extend the support to host-to-device using X86 ISA based instructions?
I was reviewing the information that you are looking for about the support of the Atomic Operations on the Intel® Xeon® Processor Scalable Family.
Let me make sure those details in order to provide you the most accurate information about it and as soon as I have an outcome of this, I will let you know all the information.
Thank you so much for been so patience.
I would like to share with you the list of processor families that support AtomicOps:
1. E7 V2
2. E5 2600 v2
3. E7 8800/4800 V3
Therefore Scalable Family does not.
If you have any other question let me know and I will be more than happy to assist you.
Thanks for your response.
Previously I just want to check if Intel® Xeon® Processor Scalable Family support PCIe AtomicOps host-to-device transactions or not. My assumption is Xeon scalable family have supported PCIe AtomicOps device-to-host transactions already.
Now I am a little confused about your answer. Could please double check and confirm that Intel® Xeon® Processor Scalable Family did not support any PCIe AtomicOps transactions, even for device-to-host (RC as completer) transactions?
Thanks. Just one more question:
However, In https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/xeon-e5-v4-datasheet-vol-2.p... https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/xeon-e5-v4-datasheet-vol-2.p... Page 132, register description about devcap2 (PCI Express Device Capabilities 2 Register)
The default value from atomic128bcascompsup, atomic64bcompsup, atomic32bcompsup (bit 9, 8 , 7) is "1" - According to PCIe spec, that means RC completer AtomicOps should be supported.
If that means E5 V4 also support PCIe RC completer AtomicOps?