Machine check exception decoding information

[idata]

Hello,

Where can one find details regarding a machine check exception reported in bank 5 for a processor with CPUID 06_1AH (X5550). The following doc

http://www.intel.com/Assets/en_US/PDF/manual/253669.pdf http://www.intel.com/Assets/en_US/PDF/manual/253669.pdf section E.3

gives information about other banks eg

register banks IA32_MC0 and IA32_MC1 - Incremental MC error codes related to the Intel QPI links

register bank IA32_MC7 - incremental error codes for internal machine check

register bank IA32_MC8 - error codes for the memory controller unit

register bank IA32_MC5 - ???

Thanks

[Daniel_O_Intel]

Simple and compound error codes apply to bits 0:15; this is common to all banks. You can decode IA32_MC5_STATUS bits 0:15 (or any register bank, bits 0:15) by using the information provided in chapter 15 (this is the machine check architecture chapter).

[idata]

Which Hardware Unit does bank 5 refers to?

For intel CPUs where can I find the information to map hardware componets to there banks number.

Intel 3A and 3B doc have no reference

AMD in their docs have clearly refered the banks name to thier Hardware Units:

• Bank 0 – Data Cache.
• Bank 1 – Instruction Cache.
• Bank 2 – Bus Unit.
• Bank 3 – Load Store Unit.
• Bank 4 – Northbridge and DRAM.

Is there a similar doc for intel CPUs?