Software Archive
Read-only legacy content
Announcements
FPGA community forums and blogs on community.intel.com are migrating to the new Altera Community and are read-only. For urgent support needs during this transition, please visit the FPGA Design Resources page or contact an Altera Authorized Distributor.
17060 Discussions

About data transferring on the data ring bus

Jie_Y_1
Beginner
‎01-05-2016 04:38 AM
841 Views

Hi all, 

I have a question about the ring bus. 

I hope if someone could tell me some specifics about how data are transferred and managed(protocol) on the BL ring please?

Appreciate your help. Thank you. 

Yin

0 Kudos

Link Copied

2 Replies
Loc_N_Intel
Employee
‎01-07-2016 11:39 AM
841 Views

Hi Jie,

Have you looked at the document "Intel® Xeon Phi™ Coprocessor System Software Developers Guide" (https://software.intel.com/en-us/articles/intel-xeon-phi-coprocessor-system-software-developers-guide) yet? this document contains some information related to your question.

0 Kudos
Copy link
Jie_Y_1
Beginner
‎01-09-2016 03:34 AM
841 Views

Hi Loc,

Thank you I have checked the system software developers guide but some mechanisms are still unclear for me to understand. For example whether data is transferred by packets or not, if so, how is the header looks like... Unfortunately didn't find any specific description is revealed in any documents.  

 

0 Kudos
Copy link
Reply

Community support is provided Monday to Friday. Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.