Is there anyway to disable SSE2 in order to run on Xeon Phi?

[Shaolong_C_]

I recently try to compile one app but found that Xeon Phi doesn't support SSE2.

Does that mean I need to recode these SSE2 in app? Is there anyway easier to disable SSE2 compilation in icc?

Thanks in advance.

[Gregg_S_Intel]

Use compile option -mmic to build for Intel® Xeon Phi™ Coprocessor x100 Product Family (formerly codenamed Knight Corner).

[Shaolong_C_]

I known -mmic for xeon phi, but ICC said that SSE2 is not supported in MIC architecture.

[Gregg_S_Intel]

If the application calls SSE2 intrinsic functions, those won't work on Intel® Xeon Phi™ Coprocessor x100 Product Family (but they will on the upcoming  Intel® Xeon Phi™ processor codenamed Knights Landing).