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TSC scaling feature - confusion on documentation.

John_E_
Beginner
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I'm confused about the internal meaning of the product of HostTSC and the TSC multiplier being shifted right 48 bits before being added to the TSC offset. I am also confused about the binary layout of the field.

If for example host frequency was 2.5 ghz, and I wanted a guest reflection of 2.6, my ratio would be 1.04. According to the very short documentation on this field:

Specifically, an affected read from the timestamp co
unter first computes the product of the value of the
IA32_TIME_STAMP_COUNTER MSR and the value of the TS
C multiplier. It then shifts the value of the
product right by 48 bits and loads EAX:EDX with the
sum of that shifted value and the value of the TSC
offset.

Assuming that the final value must be a whole number, what is the meaning of this?

 

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Quoc-Thai_L_Intel
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Hello John,

This document online may provide some hint for your case: https://www.ccsl.carleton.ca/~jamuir/rdtscpm1.pdf.

-Thai

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