Trace cache and self-modifying code

[dm71]

IA-32 Software Developer's Manual says:

For the Pentium 4 and Intel Xeon processors, a write or a snoop of an instruction in a code segment, where the target instruction is already decoded and resident in the trace cache, invalidates the entire trace cache.

Does every executed instruction get into the trace cache? If an instruction, which was executed only once but very recently, is modified, will that invalidate the trace cache?

Does this also mean that if code is read as data, the trace cache can be invalidated?

Are algorithms used by trace cache in Intel's processors described anywhere?

Thanks

[Intel_Software_Netw1]

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[Intel_Software_Netw1]

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Message Edited by intel.software.network.support on 11-15-2005 11:09 PM