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Data linear address does not appear with PEBS sampling in some architectures

Hi all,

currently I'm trying to enable PEBS module for application profiling

by using simple PEBS example in pmu-tool (https://software.intel.com/en-us/forums/software-tuning-performance-optimization-platform-monitoring....

For further checking, I simply added codes that dump IP and data linear address (0x98H) of PEBS record,

but, in some platforms (SandyBridge and IvyBridge based platform), data linear address field is always nil, while IPs are dumped in normal.

I checked the same example in SkyLake based platform, IP and data linear address appear in normal.

 

Is there any limitation for extracting data linear address in SandyBridge or IvyBridge platforms?

I checked Intel SDM, but it says data linear address field is enhanced for further profiling after SandyBridge architecture.

If anyone knows about this, please give me some advices.

 

FYI, here are platform specifications that I tried:

1. Intel i5-2500 (Sandybridge, PEBS v1) - IP(08H): O, DLA (98H): nil

2. Intel Xeon E5-2640 v2 (IvyBridge, PEBS v1) - IP (08H): O, DLA (98H): nil

3. Intel i7-6700K (SkyLake, PEBS v3) - IP (08H): O, DLA (98H): O

and I checked for 'MEM_LOAD_UOPS_RETIRED.L3_MISS (D1H_20H)'  and 'UOPS_RETIRED.ALL (C2H_01H)' events.

 

Thanks,

Jaeyoung Jang

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