I've come across several discussion forums where events like `UNC_IMPH_CBO_TRK_REQUESTS.WRITES` are mentioned, for example <a href=https://software.intel.com/en-us/forums/software-tuning-performance-optimization-platform-monitoring/topic/281497>here</a>. However, when I tried to find documentation on some of these event, like <a href=https://software.intel.com/en-us/node/589935>here </a>, I couldn't find any. I tried many micro architectures like haswell, sandy bridge etc. Some of the events I'm interested in are PAGE_WALKER_LOADS.IA32_DTLB_L1, PAGE_WALKER_LOADS.IA32_DTLB_L2 etc, their brief description, and in what arch they were used. Any help pointing me toward documentation would be helpful.
I can recommend Intel's online event database. Moreover, be more flexible with the naming of the events. You mentioned 3 events in your post. I just checked them for Intel Haswell (Desktop):
UNC_IMPH_CBO_TRK_REQUESTS.WRITES -> UNC_ARB_TRK_REQUESTS.WRITES
PAGE_WALKER_LOADS.IA32_DTLB_L1 -> PAGE_WALKER_LOADS.DTLB_L1
PAGE_WALKER_LOADS.IA32_DTLB_L2 -> PAGE_WALKER_LOADS.DTLB_L2
Keep in mind, that server systems have different Uncores. The Haswell EP Uncore for example doesn't have an event like to UNC_IMPH_CBO_TRK_REQUESTS.WRITES. You maybe have to combine multiple events to get the same information. Without testing I would say that the desktop event UNC_ARB_TRK_REQUESTS.WRITES is comparable to the server's UNC_H_IMC_WRITES.ALL event in the HA unit.