I ran `Perf` on a relatively idle system to count the number of DRAM accesses. I also used the internal `IMC` counter to count accesses. But the value obtained using the former method is much much smaller than the latter. Does anybody have ANY guesses about the reason?
The link to the detailed question is followed:
Uncontrolled measurements over different time intervals are unlikely to match.
Your L3 miss rate of 300,000 per second is tiny and could have a large number of different sources.
The UNC_IMC_DRAM_DATA_READS counter is the sum of DRAM CAS Reads on the two channels. A value of 311 million per second corresponds to 19.9 GB/s -- about 78% of the peak DRAM bandwidth. This seems too large to be solely due to IO.
The behavior of "idle" systems is increasingly difficult to understand as the operating system sees an "idle" system as an opportunity to do as much of its own maintenance work as possible without interfering with user processes. Detailed tracing of activity may explain what is happening, but it may also take months to learn enough about how the kernel works to understand the measurements.
Thank you John,
There was an error in IMC counter value which is revised now. It was ten times greater than the real value. Now it is `100` times the value of CPU counters.
I wonder why the two counters do not match. I mean if all (or almost all) of the accesses originate from the cores (not sth such as IO devices), they should show their effect in both counters (not just the IMC counter).