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Problems with Top-down Microarchitecture Analysis Method

Xueqi_L_
Beginner
‎01-28-2016 05:57 AM
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I'm trying to analyse an execution on an Intel IvyBridge CPU (Xeon E5-2620 V2) with the Top-down Microarchitecture Analysis Method, described in Chapters B of the Intel® 64 and IA-32 Architectures Optimization Reference Manual. 

Therefore I perform performance counter events measurements with Perf (perf stat -e rNNN), There are some results I don’t understand:

  1. CPU_UNHALTED.TREAD_P(0x003C) < CYCLE_ACTIVITY.STALLS_LDM_PENDING(Event A3H, Umask 06H)

       I can not understand which it means?

  1. CYCLE_ACTIVITY.CYCLES_L2_PENDING > CYCLE_ACTIVITY.CYCLES_L1D_PENDING and CYCLE_ACTIVITY.STALLS_L2_PENDING > CYCLE_ACTIVITY.STALLS_L1D_PENDING
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