Software Tuning, Performance Optimization & Platform Monitoring
Discussion regarding monitoring and software tuning methodologies, Performance Monitoring Unit (PMU) of Intel microprocessors, and platform updating.

i5 Haswell power limitting registers

Martin_D_3
Beginner
368 Views

Hi,

I have a system based on i5-4300Y SoC I am trying to remove the 6W SDP limit. I had some success using undocumented registers in MCH namely PKG_POWER_LIMIT_LO @ 0x59a0 and PKG_POWER_LIMIT_HI @ 0x59a4. But the changes to this register are not reflected until I put the device to sleep and wake it up again, why ? Do I need to modify some other registers ? None of the lock bits is set.

You don't have to give me documentation to the register, just a single line of code that will make the changes reflected would be enough.

 

Thank you !

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Patrick_F_Intel1
Employee
368 Views

Hello Martin,

I don't recommend changing undocumented registers. That is probably Intel's official position as well. There is usually a reason that things aren't publicly documented... they may not work correctly, they may damage the chip, they may cause... what is the phrase... 'unpredictable results'... and the classic 'may violate your warranty'.

Pat

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Bernard
Valued Contributor I
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Probably the exact mechanism or innerworkings of Power limiting register is given to BIOS/OS kernel developers under NDA.

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