"Parallel Computing" Posts in "Intel® ISA Extensions"

Top Taggers

User

Count

Community support is provided during standard business hours (Monday to Friday 7AM - 5PM PST). Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.

Terms of Use
*Trademarks
Cookies
Privacy
Supply Chain Transparency
Site Map

	E5-1650 v4, What are the AVX 'Base and 'Turbo' Speeds? by Gregory_B_ Beginner in Intel® ISA Extensions 07-03-2023 0 4	0	4
	It is Not possible to run latest versions of SDE, for example 7.49.0, on 32-bit Windows platforms by SergeyKostrov Valued Contributor II in Intel® ISA Extensions 05-10-2023 0 27	0	27
	How to Reduce CAL (Function Call Interrupts ) on x86_64 architectures in /proc/interrupts by Kumar__Satish Beginner in Intel® ISA Extensions 11-24-2022 0 9	0	9
	SDE debug not working on OS-X by TIMOTHY_R_Intel Employee in Intel® ISA Extensions 12-03-2020 0 4	0	4
	Why is Intel allowing this?!? by levicki Valued Contributor I in Intel® ISA Extensions 09-02-2020 0 40	0	40
	BIOS and AVX/AVX2/AVX512 by Cao__Henry Beginner in Intel® ISA Extensions 06-25-2020 0 9	0	9
	Possible error in Software Developer’s Manual by Yeager__David1 Beginner in Intel® ISA Extensions 06-17-2020 0 1	0	1
	Pinplay's Pinpoints fails on some SPEC2006 by Biswas__Ananda Beginner in Intel® ISA Extensions 06-12-2020 0 1	0	1
	What does "O" signify in MSR registers description? by Pauzé__Nathaniel Beginner in Intel® ISA Extensions 06-11-2020 0 1	0	1
	Intel please update developer's documentation at lulu.com by Russell_Van_Zandt Beginner in Intel® ISA Extensions 06-04-2020 0 0	0	0
	Links to instruction documentation by Thomas_W_Intel Employee in Intel® ISA Extensions 05-22-2020 0 38	0	38
	SDE on Windows Subsystem for Linux (WSL) fails by Pietrucha__Jakub Beginner in Intel® ISA Extensions 05-19-2020 0 1	0	1
	How to use SDE on the VS platform by Li__Gangping Beginner in Intel® ISA Extensions 05-19-2020 0 4	0	4
	Xeon Gold 6138 processor to run AVX instructions by JLaut2 Beginner in Intel® ISA Extensions 05-13-2020 0 1	0	1
	Walk through kernel page table entries by Ibrahim__Ahmad Beginner in Intel® ISA Extensions 05-13-2020 0 0	0	0
	AVX Emulator MacOS 10.15 by Miller__E Beginner in Intel® ISA Extensions 05-03-2020 0 5	0	5
	Setting Kernel space to non-cacheable on x86_64 using IA_PAT MSR or page table walks by Ibrahim__Ahmad Beginner in Intel® ISA Extensions 05-01-2020 0 0	0	0
	SDE on MacOS 10.15 by Zohar__Ronen Beginner in Intel® ISA Extensions 04-27-2020 0 7	0	7
	Why does newer Processor(microarchitecture) is run slower than older Processor? by Nguyen__Brian Beginner in Intel® ISA Extensions 04-24-2020 0 1	0	1
	Was Hardware Lock Elision completely broken by TAA mitigation? by Guteniev__Alex Beginner in Intel® ISA Extensions 04-21-2020 0 1	0	1
	PlaidML - What does the __k suffix on kernel names in the PlaidML benchmarks mean? by VMaly2 Beginner in Intel® ISA Extensions 04-09-2020 0 0	0	0
	Manual typo for instruction encoding: REX.R vs REX.B by Nelson__Luke Beginner in Intel® ISA Extensions 04-06-2020 0 0	0	0
	TSX on Whiskey Lake U by Nießing__Steffen Beginner in Intel® ISA Extensions 03-25-2020 0 2	0	2
	possible SDE regression by Beulich__Jan Beginner in Intel® ISA Extensions 03-25-2020 0 2	0	2
	VP2INTERSECT emulation segfaults by Beulich__Jan Beginner in Intel® ISA Extensions 03-25-2020 0 3	0	3