"hps" Posts in "Programmable Devices"

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	Agilex™ 5 EMIF IP for Hard Processor Subsystem (HPS) in Quartus 24.3.1 by Nicole04 New Contributor I in Programmable Devices 04-17-2025 0 26	0	26
	Agilex 5 HPS UART0 by Nicole04 New Contributor I in Programmable Devices 12-04-2024 0 5	0	5
	Agilex 5 E-Series Ethernet with 1588 via HPS EMAC by Nicole04 New Contributor I in Programmable Devices 11-26-2024 0 7	0	7
	SDRAM calibration errors with .jic file by anonimcs New Contributor III in Programmable Devices 11-15-2024 0 3	0	3
	Can't boot HPS with Early Release by anonimcs New Contributor III in Programmable Devices 10-13-2024 0 3	0	3
	Agilex 7 HPS kernel panic boot by SamJak New Contributor I in Programmable Devices 04-22-2024 0 2	0	2
	Arria 10 HPS, SPIM mapped to FPGA by TomCarpenter New Contributor I in Programmable Devices 03-03-2024 0 4	0	4
	CYCLONE V - HPS and I2C Peripheral Pin by StefanoMarsi New Contributor I in Programmable Devices 01-11-2024 0 23	0	23
	How Change I2C clock on Cyclone V HPS , Terasic DE10-Nano by Yakov_E Novice in Programmable Devices 12-27-2023 0 5	0	5
	Agilex F Tile HPS I2C and MDIO by user1232 Beginner in Programmable Devices 10-16-2023 0 2	0	2
	Reading data from FPGA on HPS with Linux - what's the best way to do it? by jackhab New Contributor I in Programmable Devices 03-14-2023 0 4	0	4
	HPS access to SDM for internal TDS readings by Scotty2 New Contributor I in Programmable Devices 01-15-2023 0 11	0	11
	Quartus and make get stuck adding the Agilex HPS IP by LIacob Novice in Programmable Devices 10-07-2022 0 10	0	10
	Cyclone V FPGA and HPS JTAG by TAYLO Beginner in Programmable Devices 03-07-2022 0 3	0	3
	EPCQ remote update using HPS and Nios II on board with Cyclone V SoC by Sergey81 Novice in Programmable Devices 07-28-2021 0 4	0	4
	DE10-Nano - Blink LED by writing to a file in Linux. by zangman New Contributor I in Programmable Devices 08-30-2020 0 2	0	2
	Stratix 10 SX 10GBASE-R Example Design and Linux Support by DZuck1 Novice in Programmable Devices 09-18-2019 0 1	0	1
	Routing HPS I2C thru FPGA Not Working by Altera_Forum Honored Contributor II in Programmable Devices 04-09-2019 0 14	0	14
	Cyclone V SoC: When routing HPS CAN0 or CAN1 pins to FPGA receive direction isn't working by JWies1 Novice in Programmable Devices 01-14-2019 0 3	0	3
	Help required! Baremetal application with custom Preloader by Altera_Forum Honored Contributor II in Programmable Devices 12-22-2018 0 14	0	14
	TSE on the DE0-Nano-SoC by AShiv Novice in Programmable Devices 08-09-2018 0 2	0	2
	Can i just power the fpga part of the soc chip？ by Altera_Forum Honored Contributor II in Programmable Devices 07-16-2018 0 1	0	1
	Impossible to modify the size of an expression in the DS-5 AE Debbuger by Altera_Forum Honored Contributor II in Programmable Devices 07-05-2018 0 1	0	1
	How to build object libraries and assembly Macro-Instructions libraries? by Altera_Forum Honored Contributor II in Programmable Devices 07-05-2018 0 3	0	3
	Include Header not found in the project: Altera-SoCFPGA-HardwareLib-GPIO-CV-GNU by Altera_Forum Honored Contributor II in Programmable Devices 06-13-2018 0 0	0	0