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DNguy4
Beginner
Intel Community
About DNguy4
Activity Feed
Posted
Exporting .stp file to csv file
on
Intel® Quartus® Prime Software
.
01-23-2020
03:00 AM
Posted
RST_N port of pll
on
Intel® Quartus® Prime Software
.
01-03-2020
01:31 PM
Posted
Re: Can I use PLL on different clock?
on
FPGA Intellectual Property
.
12-12-2019
09:16 PM
Posted
Can I use PLL on different clock?
on
FPGA Intellectual Property
.
12-11-2019
07:32 PM
Posted
Re: problem with Arria10 qdz file
on
Intel® Quartus® Prime Software
.
12-05-2019
05:31 PM
Posted
Re: Signal tap with grey background
on
Intel® Quartus® Prime Software
.
11-22-2019
05:56 PM
Posted
Re: problem with Arria10 qdz file
on
Intel® Quartus® Prime Software
.
11-19-2019
04:29 PM
Posted
problem with Arria10 qdz file
on
Intel® Quartus® Prime Software
.
11-11-2019
10:20 PM
Posted
Re: blackbox file
on
Intel® Quartus® Prime Software
.
11-07-2019
09:59 PM
Posted
Re: blackbox file
on
Intel® Quartus® Prime Software
.
11-07-2019
09:58 PM
Posted
Signal tap with grey background
on
Intel® Quartus® Prime Software
.
11-07-2019
09:57 PM
Posted
blackbox file
on
Intel® Quartus® Prime Software
.
10-09-2019
12:21 AM
Posted
Re: Memory IP for PAC card
on
FPGA, SoC, And CPLD Boards And Kits
.
07-25-2019
10:05 PM
Posted
Re: Memory IP for PAC card
on
FPGA, SoC, And CPLD Boards And Kits
.
07-24-2019
08:48 PM
Posted
Re: Memory IP for PAC card
on
FPGA, SoC, And CPLD Boards And Kits
.
07-24-2019
08:42 PM
Posted
Memory IP for PAC card
on
FPGA, SoC, And CPLD Boards And Kits
.
07-23-2019
07:11 PM
Posted
Program the clocks on Intel PAC card with Arria GX10
on
FPGA, SoC, And CPLD Boards And Kits
.
07-23-2019
02:24 PM
Posted
Using Intel Arria10 PAC card in 10G mode
on
Intel® SoC FPGA Embedded Development Suite
.
06-19-2019
02:40 AM
Posted
Re: MPFE (multiport front end)
on
FPGA Intellectual Property
.
05-09-2019
08:49 PM
Posted
MPFE (multiport front end)
on
FPGA Intellectual Property
.
05-09-2019
08:28 PM
Latest posts by DNguy4
Subject
Views
Posted
Exporting .stp file to csv file
Intel® Quartus® Prime Software
185
01-23-2020
03:00 AM
RST_N port of pll
Intel® Quartus® Prime Software
215
01-03-2020
01:31 PM
Re: Can I use PLL on different clock?
FPGA Intellectual Property
28
12-12-2019
09:16 PM
Can I use PLL on different clock?
FPGA Intellectual Property
211
12-11-2019
07:32 PM
Re: problem with Arria10 qdz file
Intel® Quartus® Prime Software
52
12-05-2019
05:31 PM
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Community Statistics
Posts
64
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0
Member Since
08-03-2018
