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YTagu5
Beginner
Intel Community
About YTagu5
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Posted
Cosim testbench elaboration fails and psg_mpfr.dll and psg_mpir.dll not found
on
Intel® High Level Design
.
05-22-2020
05:59 AM
Posted
Re: Appropriate I/O standard to use DDIO for LVDS signals
on
Programmable Devices
.
03-19-2020
06:42 AM
Posted
Appropriate I/O standard to use DDIO for LVDS signals
on
Programmable Devices
.
02-12-2020
08:34 AM
Posted
Re: "Tcl error: ERROR: Argument <node_object> is an object filter that matches no objects. Specify one matches only one object." when using LVDS SERDES IP.
on
Intel® Quartus® Prime Software
.
02-07-2020
11:37 AM
Posted
"Tcl error: ERROR: Argument <node_object> is an object filter that matches no objects. Specify one matches only one object." when using LVDS SERDES IP.
on
Intel® Quartus® Prime Software
.
01-29-2020
08:35 AM
Tagged
"Tcl error: ERROR: Argument <node_object> is an object filter that matches no objects. Specify one matches only one object." when using LVDS SERDES IP.
on
Intel® Quartus® Prime Software
.
01-29-2020
08:35 AM
Tagged
"Tcl error: ERROR: Argument <node_object> is an object filter that matches no objects. Specify one matches only one object." when using LVDS SERDES IP.
on
Intel® Quartus® Prime Software
.
01-29-2020
08:35 AM
Posted
Re: bsp-editor not found in SoC EDS Pro 19.3
on
FPGA, SoC, And CPLD Boards And Kits
.
11-22-2019
07:26 AM
Posted
Re: bsp-editor not found in SoC EDS Pro 19.3
on
FPGA, SoC, And CPLD Boards And Kits
.
11-21-2019
03:41 AM
Posted
Re: bsp-editor not found in SoC EDS Pro 19.3
on
FPGA, SoC, And CPLD Boards And Kits
.
11-19-2019
11:05 AM
Posted
bsp-editor not found in SoC EDS Pro 19.3
on
FPGA, SoC, And CPLD Boards And Kits
.
11-19-2019
12:50 AM
Tagged
bsp-editor not found in SoC EDS Pro 19.3
on
FPGA, SoC, And CPLD Boards And Kits
.
11-19-2019
12:50 AM
Posted
Re: Pin requirements to use JESD204B
on
FPGA Intellectual Property
.
10-13-2019
02:43 AM
Posted
Pin requirements to use JESD204B
on
FPGA Intellectual Property
.
10-05-2019
06:59 AM
Tagged
Pin requirements to use JESD204B
on
FPGA Intellectual Property
.
10-05-2019
06:59 AM
Tagged
Pin requirements to use JESD204B
on
FPGA Intellectual Property
.
10-05-2019
06:59 AM
Latest posts by YTagu5
Subject
Views
Posted
Cosim testbench elaboration fails and psg_mpfr.dll and psg_mpir.dll not found
Intel® High Level Design
160
05-22-2020
05:59 AM
Re: Appropriate I/O standard to use DDIO for LVDS signals
Programmable Devices
49
03-19-2020
06:42 AM
Appropriate I/O standard to use DDIO for LVDS signals
Programmable Devices
164
02-12-2020
08:34 AM
Re: "Tcl error: ERROR: Argument <node_object> is an object filter that matches no objects. Specify one matches only one object." when using LVDS SERDE...
Intel® Quartus® Prime Software
121
02-07-2020
11:37 AM
"Tcl error: ERROR: Argument <node_object> is an object filter that matches no objects. Specify one matches only one object." when using LVDS SERDES IP...
Intel® Quartus® Prime Software
384
01-29-2020
08:35 AM
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Member Since
10-05-2019
