Hi. I'm wondering if there are any tricks to speeding up finalization. My jobs usually run for 4-6 hours, of which maybe one or two hours has profiling enabled. However, finalization can take 2-4 days. I've tried limiting the sampling rate and the total data stored, but even then it still usually takes 10x longer to finalize than to profile (I have this sense that this didn't use to be the case when I was last using vtune a few years ago; perhaps I was using an older version?). I'm currently using VTune 2019. If it will make a big difference I could try to get it upgraded, but the tools are managed centrally so that's not always easy. I'm hoping there are some things I can do to bring the finalization time down without losing too much in the way of profiling coverage.
- I’m just doing regular hotspot analysis
- As for which application, I’m not sure if you are asking which vtune application (I’m not aware of more than one), but you are asking that, it’s “ample-cl“.
I'm not sure exactly what kind of information you are looking for.
- The system is a redhat 6 linux system with a xeon processor using VTune 2019
- The command is usually run like this "amplxe-cl --start-paused --collect hotspots <command>"
- The program internally turns on and off profiling around the specific code that needs to be profiled
- The application being profiled is a compute-intensive CAD tool
I apologize for this being dropped. Here are a few suggestions for improving your finalize performance:
- Try limiting your runtime to a shorter run.
- Set a CPU mask to only collect data from specific cores. See https://software.intel.com/content/www/us/en/develop/documentation/vtune-help/top/command-line-inter... for details.
- Use the ittnotify API in your application to restrict collection to only certain regions of your application. See https://software.intel.com/content/www/us/en/develop/documentation/vtune-help/top/api-support/instru... for details.
I observed that, the finalization time is highest when the excessive callstacks information is recorded. If you do not need collecting the sampled threads stacks you may omit it and gain very fast (in my case: circa 25-35 seconds) finalization time. Of course the stacks I must reconstruct "manually" by using IDA disassembler. In order to decrease the amount of collected samples you may enable only user mode hardware events collection.
>>>However, finalization can take 2-4 days.>>>
How large is the results(*.perf or *.tb7) file?
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