From the edge through the network to the cloud, as innovations drive new connectivity and processing models, there is a growing need for flexible hardware solutions. FPGAs have been so valued in these markets because they enable the required hardware agility to realize new system architectures. With the ever-increasing bandwidth requirements across markets, the need for faster and more flexible devices has never been greater. The Intel Agilex® 7 FPGA product family has been designed to address these needs and is in production now.
Intel Agilex 7 FPGAs are built with a heterogeneous multi-die architecture, an FPGA fabric in the center connected to up to six transceiver chiplets via Intel’s embedded multi-die interconnect bridge (EMIB) technology. Each chiplet, or tile, is a small integrated circuit die containing a well-defined subset of hardened functionality. These chiplets enable a cost-effective approach to the in-package high density interconnect of heterogeneous chips. This approach allows Intel to address a broad array of applications with tailored, flexible solutions. Thus, enabling customers to realize connectivity topologies within a single device that previously would have required multiple devices.
Central to the Intel Agilex 7 FPGAs is the F-Tile chiplet, designed to support industry-leading data rates of up to 116 Gbps for a wide range of networking and communications standards via either hard intellectual property (IP) blocks for Ethernet and PCIe, or the by the use of soft IP cores to support additional protocols ranging from JESD204 to GPON and many others, providing a high degree of flexibility across Networking, 5G Wireless, Broadcast, Cloud, Test, Acceleration, and many more markets.
Figure 1. Intel Agilex 7 FPGA with F-Tile Block Diagram
Table 1. Intel Agilex 7 FPGA F-Tile Features
The production qualification of F-Tile triggers the production release sequence for 11 device densities across 8 different packages, covering both F and I-Series devices enabling customers to leverage Intel Agilex 7 FPGA fabric performance / per watt leadership on their designs today. Built on the Intel 10nm process technology, both the Intel Agilex 7 FPGA programmable logic and F-Tile chiplet leverage Intel’s robust supply chain with advanced manufacturing and test capabilities to deliver production solutions to standard lead times.
Intel continues to build on its FPGA transceiver leadership and is demonstrating at OFC the next generation of transceivers running at 224Gbps PAM4-LR, to be used in the most challenging applications, such as 800GbE and 1,600GbE, in chip-to-module or passive cable reach connectivity. At OFC, Intel will also demonstrate 800G Ethernet capability using F-Tile and Intel 800G optical module.
- For more information about the devices and solutions discussed in this blog, contact your Intel salesperson directly.
- For more information on leveraging Intel Agilex 7 FPGAs to Design Networking Solutions, read the solution brief here.
- For more information about the Intel Agilex 7 FPGA and SoC FPGA Device Overview here.
- For more information about the Intel Agilex 7 FPGA and SoC FPGA family click here.
- For more information on the Intel Agilex 7 Development Kits click here.
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Congrats, Team Intel!
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