Embedded Connectivity
Intel network controllers, Firmware, and drivers support systems

I210IS PECLKx standard

SergejDziuba
Beginner
899 Views

Hello!

We are designing our own PCB and use i210IS chip.

So, we need to know what type of differential input clock does PECLKp/n signals use? LVDS? HCSL or another?

Thank you!

Looking forward your answer!

Sergej.

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5 Replies
Zigfreid_Intel
Moderator
877 Views

Hello SergejDziuba,


Thank you for posting in Intel Ethernet Communities. 


Your query will be best answered by our Embedded Connectivity Support team. We will help you move this post to the designated team for further assistance. 


Please feel free to contact us if you need assistance from Ethernet support team.


Best regards,

Zigfreid I.

Intel® Customer Support


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CarlosAM_INTEL
Moderator
857 Views

Hello, @SergejDziuba:

Thank you for contacting Intel Embedded Community.

You need to have a Resource and Design Center (RDC) privileged account to have access to the requested information.

The RDC Account Support form is the channel to process your account update process by filling out the form stated on the following website:

https://www.intel.com/content/www/us/en/forms/support/my-intel-sign-on-support.html

You should use a business email address to evade any inconvenience. Please avoid the free email provider's address (such as the provided by Hotmail, Gmail, Yahoo, or others).

Best regards,

@CarlosAM_INTEL.

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Adolfo_S_Intel
Moderator
837 Views

Hello, @SergejDziuba 

 

Can you confirm if this current post from you is related to this previous post: https://community.intel.com/t5/Embedded-Connectivity/I210IS-PECLKx-standard/td-p/1328121/jump-to/first-unread-message or if it is a different issue?

 

Best Regards,

@Adolfo_S_Intel 

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SergejDziuba
Beginner
826 Views

Yes, it is.

So, where can get explanation for my question?

 

Thank you!

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Adolfo_S_Intel
Moderator
814 Views

Hello, @SergejDziuba 

 

If you check the Intel I210 datasheet: https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/i210-cs-cl-ethernet-controller-datasheet.pdf?asset=14546

 

Section 9.6.2.6, you can read the following:

 

 The input clock for PCIe must be a differential input clock in frequency of 100 MHz. For full specifications please check the PCI Express* 2.0 Card Electro-Mechanical (CEM) Specification (refclk specifications for Gen 1 ).


So the answer to your question is on the PECLKp/n signals follow the PCI Express® Card Electromechanical Specification Revision 1.1 for the Refclk.

Now, you will have to confirm this on your side, but at least for Revision 2.0 of the CEM specification: https://www.cl.cam.ac.uk/~djm202/pdf/specifications/pcie/PCI_Express_CEM_r2.0.pdf  the Refclk is stated to be low voltage swing differential clocks.

 

If you need more details, as mentioned earlier, access to the Intel Resource and Design Center is recommended.

 

Best Regards,

@Adolfo_S_Intel 

 

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