G3-> S5/S4. PMC_SLP_S4# not going high

[C_needs_help]

Hello,

I have received a batch of PCBs from our manufacturer that features the E3845. The design is a NEW in-house design that has been copied from an EXISTING and functional in-house design.

It is failing the Cold Boot Sequence in G3->S5/S4. Specifically, PMC_SLP_S4# is not asserting (Tek00075). The boot sequence is satisfied until this point and all timing requirements (t1...t4) are satisfied. PMC_SUSCLK[0] is correctly oscillating at 32.77kHz

As this is the first time these PCBs have been subjected to a power-up, I believe PMC_PWRBTN# is the only "EVENT" applicable for PMC_SLP_S4#?

I have also attempted to force PMC_PWRBTN# low (Tek00070) to trigger PMC_SLP_S4# but this had no effect.

Tek00075 = At power application to PCB.

- Ch1 PMC_SLP_S4# (external pullup to V1P8A)

- CH3 PMC_PWRBTN# (no pullups)

Tek00070 = Short PMC_PWRBTN# to 0V.

- Ch1 PMC_SLP_S4# (external pullup to V1P8A)

- CH3 PMC_PWRBTN# (no pullups)

[Diego_INTEL]

Hello, @C_needs_help:

Thank you for contacting Intel Embedded Community.

To clarify, the batch that you received is based on an old design with the same processor? Or with a new design you refer that is based on a design with a different processor than the E3845?

All PCB’s from this batch are having the same response for PMC_SLP_S4# and PMC_PWRBTN#?

Where did you buy those processors from?

Best regards,

@Diego_INTEL .