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Hello,
I am using the ASMII parallel IP core for my cyclone GX device. I am attempting to read data off of the flash chip. I used the JTAG chain /byte blaster to program the flash chip (so I know that something is written to memory). Whenever I try to read from the flash chip using the IP core, the dataout is stuck at all zeros (see the below signalTap picture).
I do not have any warnings that the dataout is being driven to a constant or being synthisized away and I believe the contents of the flash chip are not all zeros.
Do you have any suggestions for debugging this issue?
I am going to start adding synth noprune/preserve and see if this helps.
Kind Regards,
James
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Hi,
May I know at what address did you read the signal?
Regards,
Aiman
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Hi,
Do you have any update for this case?
Regards,
Aiman
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Hello,
I noticed this issue for all addresses on the first 2 pages (starting at 0x0).
I eventually determined that the root of this problem seems to be related to Altera's IP core. For whatever reason, the ASMII parallel IP core has terrible fanout and key signals are easily synthesized away signals (even though the physical QSPI pins are interfaced within the module). Adding synthesis attribute noprunes and adding additional registers to help reduce this fanout helped and prevented key registers from being synthesized away.
An example of this would be the ASMII parallel IP core's busy signal. This busy signal is connected to an actual busy pin on the flash chip, yet it can be synthesized away without proper noprune synthesis attributes. Any ideas as to why this could be happening? Does this have something to do with the way the IP core is synthesized (the pins aren't called out in the QSF/pin assigner)?
Kind Regards,
James
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Hi,
Please check the signal at the top level port. Are they connected to the correct pin?
Also, is the board connected to any output?
Regards,
Aiman
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Hi,
Any update?
Regards,
Aiman
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Hi,
Do you still need further assistance for this case?
Regards,
Aiman
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