FIR II Compiler propagation delay

[Altera_Forum]

Hello, 

I am using the single channel FIR II with 50 taps coefficients. I expect to get 50 samples delay between input and output data. However with the ModelSim simulation waveforms I can see that at the beginning of the simulation the delay between input data and output data and between input valid and output valid is only 6 samples. Does it mean I have to disregard first 44 output samples at the beginning of the simulation? Please see attached simulation waveforms. Also does any Altera document describe that FIR II delays with the waveforms? Thanks, Mike

[Altera_Forum]

--- Quote Start ---  Hello, I am using the single channel FIR II with 50 taps coefficients. I expect to get 50 samples delay between input and output data. However with the ModelSim simulation waveforms I can see that at the beginning of the simulation the delay between input data and output data and between input valid and output valid is only 6 samples. Does it mean I have to disregard first 44 output samples at the beginning of the simulation? Please see attached simulation waveforms. Also does any Altera document describe that FIR II delays with the waveforms? Thanks, Mike  --- Quote End ---    That is the latency of registers. Without registers(and this is not realistic) you will have zero latency.  Probably you are thinking of group delay, this is signal delay through filter and is equal to (taps-1)/2 and means if you input a sine wave then its peak will be delayed that much.

[Altera_Forum]

--- Quote Start ---  That is the latency of registers. Without registers(and this is not realistic) you will have zero latency.  Probably you are thinking of group delay, this is signal delay through filter and is equal to (taps-1)/2 and means if you input a sine wave then its peak will be delayed that much.  --- Quote End ---    Yes. I am talking about filter inputs to filter output delay. I am using 50 taps. and I can see in my waveforms the first input sample delayed by 50 samples. At the same time the first valid output asserted 6 samples after the first valid input is asserted. Please see the attached waveforms. Does it mean the first 44 samples I see in my simulation waveforms are garbage?