Generic serial flash interface in quad IO mode while running form flash

rienk_dejong · ‎02-09-2023

We have a design on a CycloneV GX with an ISSI spi Flash chip.

This board does not have any external RAM to run the nios application on so we are running the software form flash.

Due to chip shortages we had to use an ISSI flash device instead of one of the supported devices.

FPGA is booting form the flash device and NIOS application is also running form the device.

The only issue is that it is running in single bit read mode instead of quad bit mode. Which makes the boot times very slow.

I have done some testing with the Generic serial flash controller and our ISSI chip on another board where I can run code in external ram, and here I can configure the chip and IP in quad mode and I see a big difference in read speeds.

When I try the same IP settings and chip commands I run into the issue that when I change the IP settings the chip is no longer accessible to read the next instructions to configure the chip or the other way around.

I also tried to change the default settings of the IP but then I still run into the issue that the instructions are on the flash and the IP and chip are not in the same mode.

Is there a method how to get these two parts to both run in quad mode out of the box?

Parts / Versions:

CycloneV 5CGXFC5F6M11C6

Flash ISSI IS25LP128F

Quartus 18.1

hareesh · ‎02-12-2023

Hi,

i seen your issue. please give me some time. i need check this. as soon as possible i will get back to you.

Thank you,

hareesh · ‎02-15-2023

Hi,

please check bellow attachment. in that marked register controls the mode selection. once check in your design that register enabled for quad mode or not.

https://www.intel.com/content/www/us/en/docs/programmable/683419/21-2-20-1-1/user-guide.html

rienk_dejong · ‎03-03-2023

Hi Hareesh,

I finally have access to my account again.

I can't view the image in your message above, only the link to the manual.

Keep in mind that I am using version 18.1 instead of 21 that the link points to.

I have tried to set the different configuration registers to setup the IP in quad mode. But my problem is that however I do it, either the IP or the chip is behind on the mode change since I can't change both at the same time. And when they are not configured the same the code does not run from flash.

Regards,

Rienk

hareesh · ‎02-19-2023

Hi,

any update on your issue?

hareesh · ‎02-22-2023

As we do not receive any response from you on the previous question/reply/answer that we have provided. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.

Maikel_Reus · ‎03-01-2023

Hi Hareesh,

My colleague is currently unable to login, he is communicating with the support desk to get that issue fixed.

rienk_dejong · ‎03-08-2023

Hi Hareesh,

Have you seen my reply to your question above?

Regards,

Rienk