PCIe test from devkit not working on DK-DEV-AGI027RBES

[xalverti]

Hi,

I am trying to setup the specific device -- and started with the examples from here:

https://cdrdv2.intel.com/v1/dl/getContent/778611

I am using Quartus 24.1. 

When I compile the pcie_ed example it has a critical warning of failing to meet timing constraints.

If I program the FPGA with the pof file generated from the produced sof file, the device is not detected through lspci. 

Through configuration device I see that the device is in USER MODE after programming.

Do you know what could be the case?

Best Regards,

Chloe

[xalverti]

Please note that we have both tried with cold and warm power cycles after programming and we never detect the device with lspci. 

[wchiah]

Hi,

Do you means you program the .sof directly , and everything is work well, including the lspci and ltssm link up ?

When you try to convert .sof to .pof you are seeing error ? Am I understanding this correctly ?

Can you please check the step as mentioned below ? Please ensure you not missing any of the step.

https://www.intel.com/content/www/us/en/docs/programmable/683673/24-1/converting-sof-to-pof-file.html

Regards,

Wincent_Intel

[xalverti]

No, we have never tried with the sof file alone. We only try with pof file.

We followed the steps you mention so this is not the issue. 

How should we proceed?

Chloe

[xalverti · Accepted solution]

I changed the device PCIe slot and somehow it worked. I mark this case as resolved.

[wchiah]

Hi

Glad that you solve the problem, thanks for sharing with me the solution as well.

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Wincent_Intel

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