Stratix 10 GX 25G Ethernet Intel FPGA IP is not estabiling link with the NIC E810

[Prathyusha_Gandi]

Stratix 10 GX board has been connected to NIC E810 using QSFP and 25G Ethernet Intel FPGA IP example design is implemented on the board.

Board is programmed with the bit file but still the link is not established with the NIC, showing the status as DOWN.

 What is the reason for the status being DOWN? How to establish the link? 

[Paveetirra_Srie]

Hi Prathyusha_Gandi,

Apologize for the delay.

I am still liaising with our engineering team on this issue and will let you know as soon as I have feedback.

Regards,

Pavee

[Paveetirra_Srie]

Hi,

Good day.

May I know what Quartus version that you're using?

Regards,

Pavee

[Paveetirra_Srie]

We do not receive any response from you to the previous question that I have provided. This thread will be transitioned to community support. 

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Thank you.